digital_gate.hpp

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// sbl/hw/components/input/digital_gate.hpp — Debounced digital gate input
//
// DigitalGateInput takes logical GPIO readings (true = gate high) and provides
// debounced state with edge detection. Designed for Eurorack gate/trigger
// signals read via GPIO pins (as opposed to GateInput which takes ADC values
// with Schmitt trigger thresholds).
//
// Optional retrigger lockout prevents spurious double-triggers from noisy edges.
//
// Usage:
//   sbl::components::input::DigitalGateInput gate;
//   gate.update(gpio_reading);           // Feed logical state each tick
//   if (gate.rising()) { ... }           // One-shot rising edge (auto-resets)
//   if (gate.gate()) { ... }             // Current debounced state
 
#ifndef SBL_HW_COMPONENTS_INPUT_DIGITAL_GATE_HPP_
#define SBL_HW_COMPONENTS_INPUT_DIGITAL_GATE_HPP_
 
#include <cstdint>
 
namespace sbl::components::input {
 
struct DigitalGateConfig {
    uint8_t debounce_count = 3;      ///< Consecutive identical readings to accept
    uint16_t retrigger_lockout = 0;  ///< Minimum ticks between rising edges (0 = disabled)
};
 
/// Debounced digital gate input with edge detection and retrigger lockout.
///
/// @note All public methods are ISR-safe — pure state machine with no hardware I/O.
class DigitalGateInput {
public:
    explicit DigitalGateInput(const DigitalGateConfig& config = {})
        : threshold_(config.debounce_count),
          lockout_time_(config.retrigger_lockout) {}
 
    /// Feed a new logical GPIO reading.
    /// Call once per update cycle (e.g. 200 Hz control rate).
    void update(bool logical_state) {
        // Tick down lockout
        if (lockout_remaining_ > 0) {
            --lockout_remaining_;
        }
 
        if (logical_state == stable_) {
            // Input matches stable — reset debounce counter
            counter_ = 0;
        } else {
            // Input differs — count toward transition
            ++counter_;
            if (counter_ >= threshold_) {
                bool was = stable_;
                stable_ = logical_state;
                counter_ = 0;
 
                if (stable_ && !was && lockout_remaining_ == 0) {
                    rising_ = true;
                    lockout_remaining_ = lockout_time_;
                } else if (!stable_ && was) {
                    falling_ = true;
                }
            }
        }
    }
 
    /// Current debounced gate state (true = high).
    bool gate() const { return stable_; }
 
    /// True if gate just went high (rising edge).
    /// Consuming read — resets after first read. Call once per update cycle.
    bool rising() {
        bool e = rising_;
        rising_ = false;
        return e;
    }
 
    /// True if gate just went low (falling edge).
    /// Consuming read — resets after first read. Call once per update cycle.
    bool falling() {
        bool e = falling_;
        falling_ = false;
        return e;
    }
 
    /// Reset all state.
    void reset() {
        counter_ = 0;
        stable_ = false;
        rising_ = false;
        falling_ = false;
        lockout_remaining_ = 0;
    }
 
private:
    uint8_t threshold_;
    uint16_t lockout_time_;
 
    uint8_t counter_ = 0;
    bool stable_ = false;
    bool rising_ = false;
    bool falling_ = false;
    uint16_t lockout_remaining_ = 0;
};
 
} // namespace sbl::components::input
 
#endif // SBL_HW_COMPONENTS_INPUT_DIGITAL_GATE_HPP_